Code Generation for Infineon PSoC™ 6 and PSOC™ Edge boards

This section provides step-by-step information on generating, optimizing and validating the code for Infineon PSoC™ 6 and PSOC™ Edge boards. After training and evaluating a model, the next step is code generation. You have the option to generate the code for the model with or without optimization.

Understanding Model Optimization

Model optimization involves refining the code to enhance performance, efficiency, and accuracy on the development boards. This process ensures that the model runs smoothly and effectively in various environments. By optimizing the model, you can reduce computational costs, improve execution speed, and achieve better overall results. You can optimize the preprocessor as well as the network to enhance the model efficiency and performance. Studio provides several options to optimize the preprocessor using the CMSIS-DSP Library. The CMSIS (Cortex Microcontroller Software Interface Standard) library provides a robust framework for this optimization. By leveraging the CMSIS library, you can enhance the computational efficiency and overall effectiveness of your model, ensuring the model runs seamlessly and meets performance expectations.

Understanding Model Validation

Model validation involves validating the performance of the optimized model by checking the performance against test data (accuracy), and visualize the implementation resource requirements, such as the number of cycles to run the inference engine and the memory size of the neural network model and inference working memory. The report includes data on the inference engine when running on a computer (reference model with the best accuracy and higher memory requirements), and on the target device (limited hardware resources).

How to generate the Code?

To generate the code, follow the steps:

1. Navigate to your project directory and open the the model file (*.h5).

2. Click the Code Gen tab on the left pane and configure the following parameters:

   
   

   • In Architecture, select Infineon PSOC as the architecture type.

   • In Target Device, select the required Infineon board or core type from the following options - PSoC 6, PSOC Edge M33/NNLite, PSOC Edge M55/U55.

   • In Output Directory, browse and select the directory where you want to save the generated code. By, default Infineon is selected as the default folder.

   • In Output File Prefix, enter the prefix to be added at the beginning of the generated file names.

   • In C Prefix, enter the prefix to be added to generated API functions so as to avoid naming collisions with functions created outside Studio.

3. In Preprocessor Acceleration, optimize the code using the CMSIS-DSP Library by selecting the one of the following options:

   • None-Don't use CMSIS, if CMSIS is not supported on the target board.

   • CMSIS Floating Point (Float32), provides accelerated float 32 arithmetic, making this option an excellent choice for target boards with an ARM Core featuring a Floating Point Unit (FPU). This option is compatible with all units, including non-accelerated custom units. This option is user-friendly, offers good performance, but necessitates the presence of an FPU.

   • CMSIS Shifted Fixed Point 16 Bit (Q15), for excellent performance on target boards without an FPU, achieving similar efficiency to CMSIS Float32 on boards with an FPU. This option uses only 16 bits, consuming half the memory compared to CMSIS Float32. However, implementing support for this type in all custom units can be complex.

   • CMSIS Shifted Fixed Point 16 Bit (Q31), if you require high-resolution (32-bit) on your features and your target board lacks an FPU.

4. Check the Enable Network Quantization checkbox, if you want to quantize the network code along with the preprocessor code. If you enable this option, you must provide calibration data to generate a 8-bit quantized model.

   • In Use Project file (.improj), select the radio button to provide the calibration data using the project file. When this option is enabled, the calibration data will be utilized from the training set.
     OR
   • In Recursive Directory Search, select the radio button to provide the calibration data from the desired directory.

5. Select the Enable Sparsity checkbox to further optimize the model by packing sparse weights, thereby saving memory when deploying the model on the target device.

   
   
   

After setting the parameters, you have two options: validate the model or proceed without validating the model, depending on your requirements. If you select not to validate, then select None under Validation and skip directly to step 7 and follow the subsequent steps to generate the code. However, if you prefer to validate the model, follow the steps to set the validation parameters before generating the code.

6. You can validate the model using any of the following options:

   
   
   • Select Use Random Numbers, if you want to validate the model with random data
   • In Use Project file (.improj), select the radio button to provide the validation data using the project file. When this option is enabled, the validation data will be utilized from the test set.
     
   • In Recursive Directory Search, select the radio button to provide the validation data from the desired directory. Validate using .data and .wav files found recursively in the selected directory.
   • In Max Data Files, enter the maximum number of files to use for validating the model. If the number of files in the selected directory exceeds the number entered in this parameter, a random subset of files will be selected for validation. If the validation fails due to out of memory errors, reduce the number of files.

7. Click Update Dependencies button to install the core tools to generate the code. This is one time installation and may take some time.

8. Once the core tools are installed, click the Generate Code button. The code (model.c/.h files) is generated in the Output Directory defined earlier and a Model performance and validation report opens.

After generating the code, lets deploy the code on the Infineon PSOC boards using ModusToolbox. To know how refer to Deploy model on PSoC™ 6 and PSOC™ Edge boards.

Supported layers and operators when generating optimized code for the PSOC family of Microcontrollers in DEEPCRAFT™ Studio

Below is a list of supported operators for the DEEPCRAFT™ Studio and PSOC code generation respectively.

Opening a model and generating code using Studio

To be able to open a .h5 model in DEEPCRAFT™ Studio and generate optimized code for the PSOC family of microcontrollers, the network part of the model is limited to the operators that are supported in both ModusToolbox™ ML and DEEPCRAFT™ Studio as below.

Network Layer/Operator	ModusToolbox™ ML	DEEPCRAFT™ Studio
Activation	✓	✓
Add	✓	✓
AveragePooling1D	✓	✓
AveragePooling2D	✓	✓
BatchNormalization	✓	✓
Concatenate	✓	✓
Conv1D	✓	✓
Conv2D	✓	✓
Dense	✓	✓
Dropout	✓	✓
Flatten	✓	✓
GlobalAveragePooling1D	✓	✓
GlobalAveragePooling2D	✓	✓
GlobalMaxPooling1D	✓	✓
InputLayer	✓	✓
LeakyRELU	✓	✓
LSTM	✓	✓
MaxPooling1D	✓	✓
MaxPooling2D	✓	✓
RELU	✓	✓
Reshape	✓	✓
Softmax	✓	✓
Abs	✓	✓
Add_N	✓	✓
Arg_Max	✓	✓
Arg_Min	✓	✓
Dequantize	✓	✓
Fully_connected	✓	✓
Log	✓	✓
Maximum	✓	✓
Minimum	✓	✓
Mul	✓	✓
Neg	✓	✓
Sqrt	✓	✓
Square	✓	✓
Sub	✓	✓
Exp/Pow	✓	✓
Gated Recurrent Unit	x	✓
Conv1D Transpose	✓	✓
Time Distributed	x	✓

The preprocessor part of the model however, is limited to the operators supported in DEEPCRAFT™ Studio.

Preprocessor Layer/Operator	ModusToolbox™ ML	DEEPCRAFT™ Studio
Clip	✓	✓
BitUtilization	✓	✓
QShift	✓	✓
Quantize	✓	✓
Trim_shape	✓	✓
Div	✓	✓
DotT	✓	✓
Stack	✓	✓
Average	✓	✓
Take	✓	✓